Frequently Asked Questions

  

Assembling eGaN® FETs

How do I assemble EPC’s enhancement mode GaN transistors?

eGan FETs can be assembled easily like any other Land Grid Array (LGA) device. EPC has published an application note as well as quick-start guides for die attach and die removal. All of these can found at http://epc-co.com/epc/DesignSupport/AssemblyBasics.aspx

The gap between the soldering pads of the transistors is very small: do you have any suggestions as to how to withstand high voltages between the drain and source?

EPC has published two application notes on this subject. The first of these is, "EPC GaN Transistor Application Readiness: Phase One Testing”, and the second is, “Assembling eGaN FETs”. In the first of these applications notes, EPC demonstrates that the separation between the terminals of every part type is adequate to withstand full rated voltage. In the second of these application notes, EPC gives information and guidelines for the reliable assembly of these devices.

Our team has questions on manufacturing.

If you have general questions about this or any related topic, please contact us at info@epc-co.com. eGaN FETs are offered with LGA solder pads similar to the common chipscale devices. Several companies have put them through their internal design for manufacturing (DFM) process and have found no issues. This new generation of transistor is faster and smaller than any power devices available until now. This is both an opportunity to create end-products with new benchmarks in power density, and a challenge in that it may require users to increase the precision of their assembly techniques. EPC has written an application note to help users economically assemble these LGA devices as well as quick start guides for die attach and die removal in a lab setting. All of these resources are available at http://epc-co.com/epc/DesignSupport/AssemblyBasics.aspx

Do the EPC eGaN parts require under-fill during manufacturing?

eGaN FETs do not require underfill. Underfill is usually used to compensate the effects of mismatch in CTE (Coefficient of Thermal Expansion) and to protect against moisture and ionic components and other hostile operating environments. EPC has tested parts with both underfill and no-underfill with no measured difference in performance or reliability. For more details, our “Assembling eGaN FETs” application note can be found on the Assembly Basics page at http://epc-co.com/epc/DesignSupport/AssemblyBasics.aspx

Do the EPC eGaN parts require any special steps during the manufacturing process?

Users can generally apply standard surface mount techniques to successfully attach EPC’s eGaN® FETs onto standard PCBs. Detailed recommendations can be found in our “Assembling eGaN FETs” application note at http://epc-co.com/epc/DesignSupport/AssemblyBasics.aspx. All EPC eGaN devices are MSL-1 rated.

How much pressure can be applied to the EPC die?

Please note that the below response applies to the following LGA package devices: EPC2001C, EPC2007C, EPC2010C, EPC2012C, EPC2014C, EPC2015C, EPC2016C, EPC2019, EPC8002, EPC8004, EPC8009 and EPC8010.

EPC has determined that the die in the list above can withstand up to 200 psi without adverse effect to the die parametric performance. It is important to note that this number assumes there is not a severe assembly issue (i.e. die tilt) that could affect the attachment of the heat sink material and/or the uniformity of applied pressure.