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Frequently Asked Questions

  

eGaN Devices in Circuits

What is the best place to find general information on applying EPC’s enhancement mode GaN transistors?

EPC has published a general tutorial on using these high-performance power devices at, http://epc-co.com/epc/documents/product-training/Using_GaN_r4.pdf. EPC has also authored a book titled, “GaN Transistors for Efficient Power Conversion” that can be purchased at Amazon.com or through EPC’s web site http://epc-co.com/epc/Products/Publications.aspx

Your threshold voltage is low compared with silicon MOSFETs. How does this impact turn off speed?

eGaN devices have a very low temperature coefficient for their threshold voltage. This gives the user added safety margin despite the lower threshold voltages at room temperature. The QGD of EPC eGaN® FETs is also very low, hence the switching speed is quite high; it can be turned off in a few nano seconds. In order to avoid dv/dt turn-on, it is critical to have very low impedance in the gate-source circuit as well as a low impedance pull down for the gate circuit. Gate drivers like LM5113 and LM5114 from Texas Instruments are designed specifically for eGaN devices and will take care of many of these requirements. For more tips on driving eGaN FETs, see http://powerelectronics.com/power_semiconductors/first-article-series-gallium-nitride-201101

Your threshold voltage is low compared with silicon MOSFETs. How do I handle dV/dt immunity?

It should also be noted that eGaN devices have a very low temperature coefficient for their threshold voltage. This gives the user added safety margin despite the lower threshold voltages at room temperature. The ratios of CGD to CGS are quite good in holding the device off under a dV/dt condition. This is a capacitive divider, so care must be taken in the gate drive to have a low resistance turn off and good layout such that inductance is minimized in the turn off loop to keep the effective impedance low. The magnitude will depend on dV/dt and voltage. Gate drivers like LM5113 and LM5114 from Texas Instruments are designed specifically for eGaN FETs; http://epc-co.com/epc/Products/eGaNDrivers.aspx

You say that the high frequency capability of the devices could be an issue. What must I be mindful of when laying out my board?

Generally, the eGaN FET should be treated as any other MOSFET, keeping in mind that it does have the capability of higher performance operation because of its relatively low total gate charge (Qg) and small Crss. Some general guidelines:

  • Drive the gate with 5V, keep max gate voltage below 5.5V.
  • Minimize gate source circuit impedance, it is advisable keep the gate source loop as small as possible, even at the cost of longer paths in drain circuit.
  • Use a low impedance driver
  • There are driver IC’s developed to optimize the performance of eGaN FETs in circuit. For a list of current available eGaN FET optimized IC’s please see http://epc-co.com/epc/Products/eGaNDrivers.aspx

The “Using GaN on Silicon Power Transistors” application note, http://epc-co.com/epc/documents/product-training/Using_GaN_r4.pdf , has further information. In addition, land pad layouts that minimize inductance can be found on all EPC data sheets at http://epc-co.com/epc/Products/eGaNFETs.aspx . Chapter 3 of the book titled, “GaN Transistors for Efficient Power Conversion” covers this topic in detail.

Can eGaN FETs be paralleled, if so what are the key elements for a good design?

eGaN Devices are positive temperature coefficient devices and are good candidates for parallel operation. However, since these devices can switch up to 10x faster than standard Silicon FETs, special care must be taken in the layout and driving aspects of this configuration. EPC has written a white paper comparing different layout schemes and identifying the best paralleling configuration. Please refer to White Paper: Paralleling eGaN FETs at http://epc-co.com/epc/documents/papers/Paralleling eGaN FETs.pdf

How can I provide enhanced cooling to the eGaN FETs?

EPC has conducted electro-thermal experiments using our standard development boards, EPC9002 and EPC9006, to evaluate the impact of providing top side die cooling. A small heatsink was mounted on top of the EPC devices using a thermal interface material, that also provided electrical isolation, and tests were conducted to determine the impact on the temperature of the devices when operated under increased power loss conditions. Details of the experimental setup and results can be found in Power Electronics Technology “eGaN® FET – Silicon Power Shoot-Out Volume 8: Envelope Tracking” (http://epc-co.com/epc/DesignSupportbr/Applications/EnvelopeTracking.aspx)

Wireless charging is getting popular these days, are eGaN FETs a good choice for wireless charging?

There are a couple of different popular wireless charging architectures available in the market. eGaN FETs offer the unique opportunity and possibilities of flexibility and distance by enabling operations in the MHz range, EPC will soon be publishing a white paper on this.

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Do you see any benefits from using eGaN FETS in power amplifiers in Wireless Base Stations?

Power Amplifiers (PA) commonly use depletion mode GaN FETs since they are capable of switching at several hundreds of MHz. The typical efficiency of PA is in the the 20 to 30% since the Peak to Average Ratio (PAR) is very low. With the emerging technologies like LTE for wireless, the demand for power is going up and several new techniques like Envelope Tracking (ET) – where the voltage feeding the power amplifier is modulated corresponding the modulating signal – are evolving to improve the efficiency of PAs. eGaN FETs are capable of switching at several tens of MHz at the voltage of interest in PAs, enabling the adoption of efficient Envelope Tracking architectures in these applications for improving the efficiencies. For more information on eGaN FETs in Envelope Tracking applications please see: http://epc-co.com/epc/DesignSupportbr/Applicaitons/EnvelopeTracking.aspx

Does EPC plan to offer a development board for evaluation of eGaN® FETs in Class D Amplifiers?

EPC development boards are designed to help simplify the evaluation process of EPC’s eGaN® FETs. The list of available development boards and supporting documentation is growing and can be found at http://epc-co.com/epc/Products/DemoBoards.aspx The EPC9001 development board can be used to create Class D audio designs by connecting the development board to your class D design as you would any half bridge (Two EPC9001 development boards can be used for a full-bridge class D design) as shown in the quick start guide. As the minimum dead-time in class D is critical to limit cross-over distortion, this can be adjusted by changing R5 and R6 for rising and falling edges accordingly. The current values have been chosen to avoid shoot-through given part-to-part variation of all other board components and may not be optimum for a given board. Please take care during this adjustment to avoid shoot-through. We suggest adjusting these resistors only while running VDD and PWM alone with no bus voltage and measuring both gate signals simultaneously to determine the dead-time.

Does EPC have application information on the use of eGaN® FETs in inverter applications for solar panels?

The EPC9001 and EPC9002 development boards can be used to create inverters for solar panels as they are designed for buck / half-bridge -type applications and can operate over a wide range of duty cycles. Since these development boards form a complete half-bridge with gate drive, it can easily be connected to an existing inverter circuit by replacing the current half-bridge devices. To get more information about EPC’s growing list of development and demo boards, or to purchase these boards, go to http://epc-co.com/epc/Products/DemoBoards.aspx

Does EPC have application information on the use of eGaN® FETs in LED illumination applications?

The use of LEDs for illumination (not just backlighting) has proliferated in recent years and there are numerous applications and topologies. The EPC9001 and EPC9002 development boards can be used to create LED backlighting solutions with very high contrast ratio, but are designed for buck / half-bridge type topologies. For anyone experienced in the art it is possible to operate this ‘backwards’ as a synchronous boost – noting that the input PWM will now be complimentary to what is required. Care should be taken in doing so as the output bus voltage can easily be boosted above the rated maximum voltage.

To get more information about EPC’s growing list of development and demo boards, or to purchase these boards, go to http://epc-co.com/epc/Products/DemoBoards.aspx.

Does EPC have application information on the use of eGaN® FETs in backlight applications?

The main question here would be the choice of topology to be employed. The EPC9001 and EPC9002 development boards can be used to create LED backlighting solutions with very high contrast ratio, but are designed for buck / half-bridge type topologies. For anyone experienced in the art it is possible to operate this ‘backwards’ as a synchronous boost – noting that the input PWM will now be complimentary to what is required. Care should be taken in doing so as the output bus voltage can easily be boosted above the rated maximum voltage.

To get more information about EPC’s growing list of development and demo boards, or to purchase these boards, go to http://epc-co.com/epc/Products/DemoBoards.aspx

There is little overhead between the recommended drive voltage and the absolute maximum gate drive voltage. How do I handle this?

It is important to keep the max gate voltage below 6V for long term reliability. We have developed drive level shifters, and discrete gate drivers that not only manage drive voltage, but also manage deadtime. Examples are currently implemented on development boards EPC9003, EPC9004, EPC9005, and EPC9006. For a detailed description of our recommended discrete solution please see the article http://www.how2power.com/newsletters/1006/articles/H2PowerToday1006_design_EPC.pdf

In June of 2011, Texas Instruments announced the industry’s first eGaN FET driver. The LM5113 is a 100V half-bridge driver addressing a wide range of power converter topologies. They have subsequently released the LM5114, a low side gate drive compatible with eGaN FETs (http://epc-co.com/epc/EventsandNews/News/EntryId/604/New-gate-driver-extends-TIs-family-of-GaN-FET-driver-ICs.aspx)

A list of known partner IC’s is maintained at http://epc-co.com/epc/Products/eGaNDrivers.aspx

Your higher voltage devices have lower thresholds than silicon MOSFETs. Where can I find a driver to work with these?

In June of 2011, Texas Instruments announced the industry’s first eGaN FET driver. The LM5113 is a 100V half-bridge driver addressing a wide range of power converter topologies. They have subsequently released the LM5114, a low side gate drive compatible with eGaN FETs (http://epc-co.com/epc/EventsandNews/News/EntryId/604/New-gate-driver-extends-TIs-family-of-GaN-FET-driver-ICs.aspx)

A list of known partner IC’s is maintained at http://epc-co.com/epc/Products/eGaNDrivers.aspx

Additionally, we have developed drive level shifters, and discrete gate drivers that not only manage drive voltage, but also manage deadtime. Examples are implemented on development boards EPC9003, EPC9004, EPC9005, and EPC9006. For a detailed description of our recommended discrete solution please see the article “How2 Get the Most Out of GaN Power Transistors”. It should also be noted that eGaN devices have a very low temperature coefficient for their threshold voltage. This gives the user added safety margin despite the lower threshold voltages at room temperature.