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A 95%-Efficient 48 V-to-1 V/10 A VRM Hybrid Converter

A 95%-Efficient 48 V-to-1 V/10 A VRM Hybrid Converter

Oct 07, 2018

Introduction: Efficient Power Conversion would like to thank the authors and the University of Colorado Boulder | CUB · Department of Electrical, Computer, and Energy Engineering (ECEE) for this contribution.

 

 

Gab-Su Seo1,2, Ratul Das1, and Hanh-Phuc Le1
1Department of Electrical, Computer, and Energy Engineering, University of Colorado
2Power Systems Engineering Center, National Renewable Energy Laboratory, Colorado, U.S.A.

 

With drastically increasing demands for cloud computing and big data processing, the electric energy consumption of data centers in the U.S. is expected to reach 73 billion kWh by 2020 [1], which will account for approximately 10% of the U.S total electric energy consumption. A large portion of this consumption is caused by losses from inefficient power delivery architectures that require a lot of attention for improvements [2], [3].

Emergence of 48 V Bus Architecture and the Dual Inductor Hybrid Converter (DIHC)

As the required distribution currents keep increasing for more demanding digital loads, the conventional 12 V bus architecture has exposed higher losses, complexity, and cost for interconnects and power delivery network. To address these issues, the 48 V bus architecture has emerged to be a new industry standard. Google, HP and other prominent data center designers and users plan to employ this higher voltage architecture [4]. However, the large conversion ratio from 48 V to processor core voltages (about 1-1.8 V) poses significant challenges in the design of voltage regulator modules (VRM) pressing for high efficiency and high power density for installations in the vicinity of CPUs [5], [6], [7].

A new Dual Inductor Hybrid Converter (DIHC), originated from the Dickson switched capacitor converter [8] shown in figure 1, is proposed in [9] to effectively address the drawbacks of the conventional approaches. The DIHC, shown in figure 2, employs two interleaved inductors at the output and eliminates two large synchronous switches, S9 and S10, in the hybrid Dickson converter presented in figure 1. These improvements to the converter design enable DIHC to have nearly two times lower DC output impedance contribution for the conduction of switches and flying capacitors, and thus, half the conduction losses compared to the hybrid Dickson converter in [8].

In addition, the two interleaved inductors with naturally self-balanced currents provide DIHC with the same benefits of multi-phase converters for high current application without additional current balancing complexity [10]. Split-phase operation can also be employed in DIHC to achieve complete soft-charging for all the capacitors [8]. Detailed analysis on circuit operation and steady-state characteristics has been documented [9].

Schematic diagram of the 6-to-1 hybrid Dickson converter
Figure 1: Schematic diagram of the 6-to-1 hybrid Dickson converter [8]
Schematic diagram of the 6-to-1 dual inductor hybrid converter
Figure 2: Schematic diagram of the 6-to-1 dual inductor hybrid converter [9]

A key benefit of the DIHC is that all flying capacitors are soft-charged/discharged by inductor currents without a hard-charging mode. As flying capacitors achieve complete soft-charging, DIHC can significantly reduce capacitor size without increasing switching frequency which is a fundamental to reduce capacitor size in conventional switched capacitor converters at cost of switching loss (trade-off).

In addition, the inductors can be favorably sized for high power density due to the reduced switch voltage, such as vx1 and vx2 in figure 2, only switching between 1/6 of the input voltage Vg and 0, similar to three-level or multilevel topologies [11], [12]. With optimally-sized small capacitors and inductors, the DIHC would result in high power density power conversion, and promises high potential for high-power and high current applications.

This new converter topology is verified by a 20 W, 48 V VRM prototype. The printed circuit board implementation with key components is shown in figure 3. The component selections and specifications are tabulated in table 1. The key operation waveforms of a prototype operating at 48 V-1.6 V / 5 A are shown in figures 4 and 5.

In figure 4, the two interleaved inductor currents are naturally balanced with no need for additional balancing control. Figure 5 captures the flying capacitor voltages in steady state operation. As analyzed in previous work [9], all capacitors are soft-charging by inductor current and split-phase operation without significant voltage jump due to hard charging that occurs in conventional switched capacitor converters.

6-to-1 dual inductor hybrid converter prototype
Figure 3: 6-to-1 dual inductor hybrid converter prototype
Circuit component and parameters
Table 1: Circuit component and parameters
Operation waveforms of prototype at 48 V-1.6 V under 5 A load
Figure 4: Operation waveforms of prototype at 48 V-1.6 V under 5 A load
Flying capacitor voltage waveforms at 48V-1.6V under 5A load
Figure 5: Flying capacitor voltage waveforms at 48V-1.6V under 5A load

Figures 6 displays the measured efficiency of the prototype converter with different output voltages, from 1 V through 2 V when operating at 48 V input, and figure 7 shows the measured efficiency with input voltage range of 40 V through 54 V into 1.8 V output. Owing to superior output impedance by reasonable on-time and excellent switch utilization, soft-charging for all capacitors, and interleaving benefits, the converter can exceed 95% peak efficiency, and with 225 W/in3 power density, considering key power conversion components. It is also beneficial that the converter efficiency is kept higher than 90% down to a 20% load in data center applications, where light load efficiency is quite important for energy saving.

Measured efficiency at 48 V input with different output voltages
Figure 6: Measured efficiency at 48 V input with different output voltages
Measured efficiency at 1.8 V output with different input voltages
Figure 7: Measured efficiency at 1.8 V output with different input voltages

Table 2 compares the state-of-the art technologies for 48 V core application and highlights DIHC’s superior efficiency and relatively simple structure (few active components). Simple operations and increased duty cycle (switch on-time) promise high potential to further increase the converter power density with higher switching frequency for this architecture.

 
Comparison of DIHC to different solution for data centers
Table 2: Comparison of DIHC to different solution for data centers

Conclusion

A new hybrid converter using two interleaved inductors for high efficiency and high power density is presented. By streamlining the power conversion structure and, as a result, eliminating two freewheeling switches, the converter improves output impedance in switch and capacitor conduction losses approximately two times compared with a hybrid Dickson converter counterpart.

Interleaved dual output inductors bring the benefits of multiphase interleaving architecture for high-current applications with naturally balanced inductor currents by the flying capacitors’ steady-state operation. A 20 W proof-of-concept prototype verifies the converter’s desirable operations and characteristics, achieving a peak efficiency that exceeds 95% and with 225 W/in3 power density.

 

References

[1]  S. Arman, et al., "United States Data Center Energy Usage Report," Lawrence Berkeley National Laboratory, 2016.

[2]  A. Pratt, P. Kumar, and T. V. Aldridge, "Evaluation of 400V DC distribution in telco and data centers to improve energy efficiency," in Proc. IEEE Int. Telecommun. Energy Conf., 2007, pp. 32-39.

[3]  M. H. Ahmed, C. Fei, F. C. Lee, and Q. Li, "48-V Voltage Regulator Module With PCB Winding Matrix Transformer for Future Data Centers," IEEE Transactions on Ind. Electron., vol. 64, no. 12, pp. 9302-9310, 2017.

[4]  C. Wang and P. Jain, "A quantitative comparison and evaluation of 48V DC and 380V DC distribution systems for datacenters," in Telecommunications Energy Conference (INTELEC), 2014 IEEE 36th International, 2014, pp. 1-7.

[5]  Y. Zhang, D. Xu, M. Chen, Y. Han, and Z. Du, "LLC resonant converter for 48 V to 0.9 V VRM," in Proc. IEEE Power Electron. Specialists Conf., 2004, Vol.3, pp. 1848-1854.

[6]  M. Ye, P. Xu, B. Yang, and F. C. Lee, "Investigation of topology candidates for 48 V VRM," in Proc. IEEE Appl. Power Electron. Conf. Expo., 2002, pp. 699-705.

[7]  S. Oliver, "From 48 V direct to Intel VR12. 0: Saving ‘Big Data’ $500,000 per data center, per year," Vicor White Paper (Online), July 2012.

[8]  Y. Lei, R. May, and R. Pilawa-Podgurski, "Split-Phase Control: Achieving Complete Soft-Charging Operation of a Dickson Switched- Capacitor Converter," IEEE Transactions on Power Electron., vol. 31, no. 1, pp. 770-782, 2016.

[9]  G.-S. Seo, R. Das, ad H.-P. Le, “A 95%-efficient 48 V-to-1 V/10 A VRM hybrid converter using interleaved dual inductors,” in Proc. IEEE Applied Power Electronics Conference and Exposition (ECCE), 2018. pp. 3825-3830.

[10]  D. Baba, "Benefits of a multiphase buck converter," Texas Instruments Incorporated, 2012.

[11]  G. S. Seo and H.-P. Le, "An inductor-less hybrid step-down DC-DC converter architecture for future smart power cable," in Proc. IEEE Applied Power Electronics Conference and Exposition (APEC), 2017, pp. 247- 253.

[12]  Y. Lei, et al., "A 2-kW Single-Phase Seven-Level Flying Capacitor Multilevel Inverter With an Active Energy Buffer," IEEE Trans. Power Electron., vol. 32, no. 11, pp. 8570-8581, Nov. 2017.

[13]  J. S. Rentmeister and J. T. Stauth, "A 48V:2V flying capacitor multilevel converter using current-limit control for flying capacitor balance," in IEEE Applied Power Electronics Conference and Exposition (APEC), 2017, pp. 367-372.

[14]  M. Ahmed, C. Fei, F. C. Lee, and Q. Li, "High-efficiency high-power density 48/1V sigma converter voltage regulator module," in 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), 2017, pp. 2207-2212.

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