* (C) Copyright Efficient Power Conversion Corporation. All rights reserved. * ************************************************************************** * Version History: * 1.00: 09/23/2013 - Initial model creation * 1.01: 03/17/2014 - Adjusted braces to correct syntax errors .subckt EPC8008 gatein drainin sourcein .param scale={19.2/25} .param aWg={scale*25} A1={scale*1.593} k2={2.03} k3={0.177} rpara={0.1412/scale} + aITc={0.0036} arTc={-0.0036} x0_0={1.02} x0_1={0.1789} x0_1_TC={0.004} + dgs1={scale*4.3e-7} dgs2={scale*2.6e-13} dgs3={.8} dgs4={.23} + ags1={(scale*15.6E-12 + 13.1E-12)} ags2={scale*8.875E-12} ags3={1.56} ags4={0.26} + ags5={scale*-2.01E-13} ags6={-7.99} ags7={2.46} + agd1={scale*0.167E-12} agd2={scale*3.523E-12} agd3={-0.889} agd4={1.044} + agd5={scale*1.14E-12} agd6={-5.658} agd7={4.445} + asd1={(scale*2.72E-12 + 1.9E-12)} asd2={scale*9.00E-12} asd3={-6.1585} asd4={3.1215} + asd5={scale*6.37E-12} asd6={-42.978} asd7={28.23} rd drainin drain {(0.75*rpara*(1-arTc*(Temp-25)))} rs sourcein source {(0.25*rpara*(1-arTc*(Temp-25)))} rg gatein gate {(.6)} *Large resistors to aid convergence Rcsdconv drain source {100000Meg/aWg} Rcgsconv gate source {100000Meg/aWg} Rcgdconv gate drain {100000Meg/aWg} gswitch drain source Value {if(v(drain,source)>0, + (A1*(1-aITc*(Temp-25))*log(1.0+exp((v(gate,source)-k2)/k3))* + v(drain,source)/(1 + max(x0_0+x0_1*(1-x0_1_TC*(Temp-25))*v(gate,source),0.2)*v(drain,source)) ), + (-A1*(1-aITc*(Temp-25))*log(1.0+exp((v(gate,drain)-k2)/k3))* + v(source,drain)/(1 + max(x0_0+x0_1*(1-x0_1_TC*(Temp-25))*v(gate,drain),0.2)*v(source,drain)) ) ) } ggsdiode gate source VALUE {if( v(gate,source) < 10, + 0.5*aWg/1077*(dgs1*(exp((v(gate,source))/dgs3)-1)+dgs2*(exp((v(gate,source))/dgs4)-1)), + 0.5*aWg/1077*(dgs1*(exp((10)/dgs3)-1)+dgs2*(exp((10)/dgs4)-1)) ) } ggddiode gate drain Value {if( v(gate,drain) < 10, + 0.5*aWg/1077*(dgs1*(exp((v(gate,drain))/dgs3)-1)+dgs2*(exp((v(gate,drain))/dgs4)-1)), + 0.5*aWg/1077*(dgs1*(exp((10)/dgs3)-1)+dgs2*(exp((10)/dgs4)-1)) ) } *Parasitic gate-source capacitance *C_GS gate source {ags1} *Model for voltage dependent gate-source capacitance E_IGS tl_gs bl_gs value = {0.5*ags2*ags4*log(1+exp((v(gate,source)-ags3)/ags4))+ + ags5*ags7*log(1+exp((v(source,drain)-ags6)/ags7))+ + ags1*v(gate,source) } V_INGS br_gs bl_gs 0.0 C_IGS br_gs tr_gs {1.0e-6} R_IGS tr_gs tl_gs {1.0e-4} F_IGS gate source V_INGS 1e6 R_IGS2 bl_gs source 100Meg *Parasitic gate-drain capacitance *C_GD gate drain {agd1} *Model for voltage dependent gate-drain capacitance E_IGD tl_gd bl_gd value = {0.5*ags2*ags4*log(1+exp((v(gate,drain)-ags3)/ags4))+ + agd2*agd4*log(1+exp((v(gate,drain)-agd3)/agd4))+agd5*agd7*log(1+exp((v(gate,drain)-agd6)/agd7))+ + agd1*v(gate,drain) } V_INGD br_gd bl_gd 0.0 C_IGD br_gd tr_gd {1.0e-6} R_IGD tr_gd tl_gd {1.0e-4} F_IGD gate drain V_INGD 1e6 R_IGD2 bl_gd drain 100Meg *Parasitic source-drain capacitance *C_SD source drain {asd1} *Model for voltage dependent source-drain capacitance E_ISD tl_sd bl_sd value = {asd2*asd4*log(1+exp((v(source,drain)-asd3)/asd4))+ + asd5*asd7*log(1+exp((v(source,drain)-asd6)/asd7))+ + asd1*v(source,drain) } V_INSD br_sd bl_sd 0.0 C_ISD br_sd tr_sd {1.0E-6} R_ISD tr_sd tl_sd {1.0e-4} F_ISD source drain V_INSD 1e6 R_ISD2 bl_sd drain 100Meg .ends