In this article, different power loop layouts are analyzed with simultaneous considerations for thermal management and electric parasitics.

The results show that an improved layout can provide a significant reduction in operating temperature rise while maintaining electrical performance benefits.

EE Power
October, 2022
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GaN transistors and ICs increase power density in motor drive applications. An optimal lay-out approach allows obtaining ring-free output switching waveforms and clean current reconstruction signals either from leg shunts or from in-phase shunts.

Bodo’s Power Systems
June, 2021
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Based on the third edition textbook, GaN Transistors for Efficient Power Conversion, EPC has posted the first half of a 14-part educational video podcast series on the theory, design basics and applications, such as lidar, DC-DC conversion, and wireless power using gallium nitride FETs and ICs

EL SEGUNDO, Calif. – March 2020 – Efficient Power Conversion (EPC) Corporation has posted an update to its popular “How to GaN” video podcast series, These updated videos are based on the recently published third edition textbook, GaN Transistors for Efficient Power Conversion. This 14-part educational video podcast series is designed to provide power system design engineers a technical foundation and application-focused toolset on how to design more efficient power conversion systems using gallium nitride-based transistors and integrated circuits.

The trend for electronics is to continually push towards miniaturization while increasing performance. With silicon MOSFET technology fast approaching its theoretical limit, enhancement mode gallium nitride (eGaN^®) FETs from EPC have emerged to offer a step change improvement in power FET switching performance, enabling next generation power density possibilities by decreasing size and boosting efficiency. This article will explore the recommended layout techniques required to fully extract the benefits of EPC’s eGaN FETs.

By: Ivan Chan & David Reusch, Ph.D.
EEWeb –Modern Printed Circuits
August, 2015
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The previous columns in this series discussed the benefits of eGaN(r) FETs and their potential to achieve higher efficiencies and higher switching speeds than possible with silicon MOSFETs. This installment will discuss driver and layout considerations to improve the performance achievable with eGaN FETs.

EEWeb
By: Alex Lidow
August, 2013

Optimizing PCB layout for an eGaN FET based point of load (POL) buck converter will reduce parasitics, thus leading to improved efficiency, faster switching speeds, and reduced device voltage overshoot compared to conventional MOSFET based designs.

By David Reusch, Ph.D., Director, Applications, Efficient Power Conversion

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The ability of enhancement mode gallium nitride based power devices, such as the eGaN® FET, to achieve higher efficiencies and higher switching frequencies than possible with silicon MOSFETs has been demonstrated for a variety of applications. With improvements in switching figure of merit provided by eGaN FETs, the packaging and PCB layout parasitics are critical to high performance. This first part of this article will study the effect of parasitic inductance on performance for eGaN FET and MOSFET based point of load (POL) buck converters operating at a switching frequency of 1 MHz, an input voltage of 12 V, an output voltage of 1.2 V, and an output current up to 20 A.

By David Reusch, Ph.D., Director, Applications, Efficient Power Conversion Corporation

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