48V正越来越多地被用作计算数据中心和笔记本电脑等消费电子产品性能的新标准。全新USB PD3.1标准也正在进军笔记本电脑，部分原因是USB电压增加到48 V，在连接器和电缆的电流限制为5 A的情况下，总功率传输增加到240 W。使用USB PD新标准的兼容电源，也不断面临实现小尺寸的解决方案以满足对高功率密度的需求。GaN FET开关快和具有低导通电阻，解决了电源供电中含有多个电路所需的功率密度挑战。

Brick DC-DC converters are widely used in data center, telecommunication and automotive applications, converting a nominal 48 V bus to (or from) a nominal 12 V bus. Advances in GaN integrated circuit (IC) technology have enabled the integration of the half bridge and gate drivers, resulting in a single chip solution that simplifies layout, minimizes area, and reduces cost.

This application note discusses the design of a digitally controlled bi-directional 1/16th brick converter using the integrated GaN power stage for 48 V-to-12 V application, with up to 300 W output power, and peak efficiency of 95%.

The standard dimension of the 1/16th brick converter is 33 x 22.9 mm (1.3 x 0.9 inch). The height limit for this design is set to 10 mm (0.4 inch).

This post was originally published by Bill Kleyman on November 5, 2018 on the Data Center Frontier  web site. Learn more about eGaN technology and EPC GaN solutions for the Data Center.

The data center is an ever-changing entity and part of our technological landscape. But sometimes the biggest changes in the colocation industry happen at the core of what makes a data center tick, and may not be visible at first glance. In this instance, we’re talking about data center power, and the potential of creative solutions on the market, such as using Gallium nitride (GaN) in power conversion equipment.

Motivation

eGaN FETs are capable of switching much faster than Si MOSFETs, requiring more careful consideration of PCB layout design to minimize parasitic inductances. Parasitic inductances cause higher overshoot voltages and slower switching transitions. This application note reviews the key steps to design an optimal power stage layout with eGaN FETs, to avoid these unwanted effects and maximize the converter performance.

Impact of parasitic inductance on switching behavior

As shown in figure 1, three parasitic inductances can limit switching performance 1) power loop inductance (L_loop), 2) gate loop inductance (L_g), and 3) common-source inductance (L_s). The chip-scale package of eGaN FETs eliminates any significant inductance within the transistor itself, leaving the printed circuit board (PCB) as the main contributor. Each parasitic inductance is a consequence of the total area encompassed by the dynamic current path and its return loop. (See WP009: Impact of Parasitics on Performance).

This post was originally published May 26, 2017 on the PowerPulse.net web site . Learn more about eGaN technology and EPC GaN solutions for 48 V to Point-of-Load.

During last week’s PCIM Europe event in Nuremberg, Germany, direct 48V-to-1V power conversion architectures were a significant topic, mostly outside of the exhibit floor. Vicor was quietly showing its latest generation of 48V direct-to-chip power components. Ericsson Power Modules and Efficient Power Conversion were holding invitation-only meetings where future designs of 48V direct to load power conversion architectures were the focus of the discussions. By the end of 2017, several vendors are expected to be offering dc-dc converters delivering 48V-to-1V direct conversion.