Modern data centers’ power requirements are changing dramatically due to the rapid growth of AI workloads. As GPU platforms such as NVIDIA’s Vera Rubin push rack power from 200 kW toward the 1-MW level, traditional 48-V busbar power distribution becomes physically and economically impractical because of massive conduction losses. Current can exceed 4,000 A in the 48-V busbar before reaching the server boards.

To address these increasing current levels, the industry is transitioning to an 800-Vdc power distribution architecture. This approach enables high-voltage dc to be delivered directly to server boards, significantly increasing power capacity while reducing copper requirements and improving overall efficiency. One of the major challenges in the new 800-V ecosystem is the efficient conversion of high-voltage dc to the intermediate bus voltages of 12.5 V or 6 V required by POL voltage regulators powering AI processors, without needing an additional 800-V to 48-V conversion stage. Traditional single-stage topologies with such high stepdown ratios result in transformer complexity and limited efficiency.

However, there is an alternative, modular approach to converting 800 V to 12.5 V or 6 V in a single stage: the input-series-output-parallel (ISOP) architecture. Because of its various advantages, ISOP has emerged as the leading architecture for meeting the stringent efficiency, thermal, and power density requirements of nextgeneration AI factories. This article describes the structure, operation and benefits of the ISOP architecture, particularly with regard to

Read more – How2Power

Maurizio Di Paolo Emilio, Director of Global Marketing Communications at EPC