五月 07, 2022
Assaad El Helou, Senior Thermal/Mechanical Engineer, Applications Engineering
當引入如EPC的GaN電源FET和IC等“置換”技術,並且實現了新的性能水平時,對設計進行建模可以為電路的能力和需求提供舒適感和洞察力。本博客文章討論了最新添加到EPC GaN Power Bench,我們的在線建模工具庫,EPC的GaN FET Thermal Calculator!
十二月 05, 2017
Michael de Rooij, Ph.D., Vice President, Applications Engineering
Written by Michael de Rooij and Alana Nakata - Efficient Power Conversion
Published in: PCIM Europe 2017; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management; Proceedings of
eGaN FETs, which are available in non-traditional chip scale packages (CSP) as land grid array (LGA) and/or ball grid array (BGA) formats, have repeatedly demonstrated higher power density and higher efficiency performance than equivalent MOSFETs across various applications [1, 2]. Those improvements are contingent upon proper layout practices documented extensively in [1, 3] that minimize unwanted parasitic elements. Over the seven years since eGaN FETs were first launched into the market there have been a total of 127 device failures out of a total of more than 17 billion hours in actual use in the field, 75 of which were a result of poor assembly technique or poor printed circuit board (PCB) design practices [4]. Designers are becoming more familiar with the PCB design rules that affect manufacturability and are less forgiving compared to MOSFETs due to their relatively smaller sizes. This paper will cover the various guidelines for PCB design that maximize the performance of eGaN FETs and reliability yet still rely on existing PCB manufacturing capabilities.
對設計實例有疑問嗎? 向氮化鎵專家提問
GaN FET 及集成電路
評估板
The Growing Ecosystem for eGaN FET Power Conversion (How2AppNote 005)
How to Design an eGaN FET-Based Power Stage with an Optimal Layout (How2AppNote 007)