EPC Patents

EPC has developed proprietary enhancement-mode GaN technology that allows EPC’s FETs and ICs to broadly replace power MOSFETs and LDMOS solutions. EPC has built and continues to develop a comprehensive IP portfolio including patents granted in China, Japan, Korea, Taiwan and the United States.

Issue Date Country/Region Patent Number Title  
06/11/2016 Taiwan I538208 ION IMPLANTED AND SELF ALIGNED GATE STRUCTURE FOR GaN TRANSISTORS
05/09/2016 Korea 10-1620987 DOPANT DIFFUSION MODULATION IN GaN BUFFER LAYERS
05/03/2016 US 9331061 PARALLEL CONNECTION METHODS FOR HIGH PERFORMANCE TRANSISTORS
05/03/2016 US 9331191 GaN DEVICE WITH REDUCED OUTPUT CAPACITANCE AND PROCESS FOR MAKING SAME
02/11/2016 Taiwan I521641 METHOD TO FABRICATE SELF-ALIGNED ISOLATION IN GALLIUM NITRIDE DEVICES AND INTEGRATED CIRCUITS
12/21/2015 Taiwan I514567 BACK DIFFUSION SUPRESSION STRUCTURES
12/21/2015 Taiwan I514568 ENHANCEMENT MODE GAN HEMT DEVICE AND METHOD TO FABRICATE THE SAME
12/15/2015 US 9214528 METHOD TO FABRICATE SELF-ALIGNED ISOLATION IN GALLIUM NITRIDE DEVICES AND INTEGRATED CIRCUITS
12/15/2015 US 9214461 GaN TRANSISTORS WITH POLYSILICON LAYERS FOR CREATING ADDITIONAL COMPONENTS
12/15/2015 US 9214399 INTEGRATED CIRCUIT WITH MATCHING THRESHOLD VOLTAGES AND METHOD FOR MAKING SAME
10/27/2015 US 9171911 ISOLATION STRUCTURE IN GALLIUM NITRIDE DEVICES AND INTEGRATED CIRCUITS
10/16/2015 Hong Kong HK1165614 DOPANT DIFFUSION MODULATION IN GAN BUFFER LAYERS
10/16/2015 Hong Kong HK1165616 BACK DIFFUSION SUPRESSION STRUCTURES
09/01/2015 Taiwan I499054 COMPENSATED GATE MISFET AND METHOD FOR FABRICATING THE SAME
07/31/2015 Japan 2012-504807 COMPENSATED GATE MISFET AND METHOD FOR FABRICATING THE SAME
05/19/2015 US 9035417 PARASITIC INDUCTANCE REDUCTION CIRCUIT BOARD LAYOUT DESIGNS FOR MULTILAYERED SEMICONDUCTOR DEVICES
04/22/2015 China 201080014928.5 DOPANT DIFFUSION MODULATION IN GAN BUFFER LAYERS
04/22/2015 China 201080015360.9 BUMPED, SELF-ISOLATED GAN TRANSISTOR CHIP WITH ELECTRONICALLY ISOLATED BACK SURFACE
04/08/2015 China 201080015469.2 BACK DIFFUSION SUPRESSION STRUCTURES
03/03/2015 US 8969918 ENHANCEMENT MODE GALLIUM NITRIDE TRANSISTOR WITH IMPROVED GATE CHARACTERISTICS
02/06/2015 Japan 5689869 ENHANCEMENT MODE GAN HEMT DEVICE AND METHOD TO FABRICATING THE SAME
01/23/2015 Japan 5684230 BUMPED, SELF-ISOLATED GAN TRANSISTOR CHIP WITH ELECTRONICALLY ISOLATED BACK SURFACE
12/26/2014 Japan 5670427 DOPANT DIFFUSION MODULATION IN GaN BUFFER LAYERS
11/21/2014 Hong Kong 1165615 COMPENSATED GATE MISFET AND METHOD FOR FABRICATING THE SAME
11/18/2014 US 8890168 ENHANCEMENT MODE GAN HEMT DEVICE
10/07/2014 US 8853749 ION IMPLANTED AND SELF ALIGNED GATE STRUCTURE FOR GaN TRANSISTORS
09/02/2014 US 8823012 ENHANCEMENT MODE GaN HEMT DEVICE WITH GATE SPACER AND METHOD FOR FABRICATING THE SAME
07/30/2014 China ZL201080015425.X COMPENSATED GATE MISFET AND METHOD FOR FABRICATING THE SAME
07/22/2014 US 8785974 BUMPED, SELF-ISOLATED GAN TRANSISTOR CHIP WITH ELECTRICALLY ISOLATED BACK SURFACE
05/07/2014 China ZL201080015388.2 ENHANCEMENT MODE GAN HEMT DEVICE AND METHOD FOR FABRICATING THE SAME
04/11/2014 Taiwan I434414 ENHANCEMENT MODE GALLIUM NITRIDE TRANSISTOR WITH IMPROVED GATE CHARACTERISTICS
09/21/2013 Taiwan I409859 DOPANT DIFFUSION MODULATION IN GaN BUFFER LAYERS
05/07/2013 US 8,436,398 BACK DIFFUSION SUPRESSION STRUCTURES
04/30/2013 US 8,431,960 DOPANT DIFFUSION MODULATION IN GaN BUFFER LAYERS
03/26/2013 US 8,404,508 ENHANCEMENT MODE GAN HEMT DEVICE AND METHOD TO FABRICATING THE SAME
01/08/2013 US 8,350,294 COMPENSATED GATE MISFET AND METHOD FOR FABRICATING THE SAME