Design Tips Webinar

Design Tips to Maximize the Performance of GaN-Based Designs

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It is widely known across the power electronics industry that Gallium Nitride (GaN) FETs have demonstrated superior in-circuit performance compared to conventional silicon FETs. In this webinar we will show how using GaN FETs can be as simple as using silicon FETs by employing some easy and inexpensive design techniques. Join the webinar to discover the basic techniques for using GaN transistors in high-performance power conversion circuits to achieve maximum performance.

In this webinar, we'll discuss:

Optimal layout techniques to take full advantage of the speed of GaN
Simple, inexpensive heat-sinking techniques to extract even more power out of GaN designs and examination of an online based thermal calculator
Understanding the Impact of Dead-time, QRR, and COSS in various applications
Demonstration of an online cross-reference tool that uses your design parameters to suggest the optimum GaN FET for your design.

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Presenter: Brian Miller joined EPC in 2015, where he is the field applications engineer for eastern North America. He has over 30 years of experience in power electronics, as a design engineer and as a field application engineer. At IBM and Sony Ericsson he designed small, efficient power supplies and battery chargers for laptops, tablets, and other equipment, and designed a custom analog controller IC for laptop dc-dc and battery charging. Previous to EPC, Brian was a field application engineer for Semtech, where he was involved in designs for AC-DC, DC-DC, LED lighting, and other areas. He has authored patents, articles, and talks. Brian received his MSE and BS degrees from Duke University in Durham, N. Carolina.

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Design Tips to Maximize the Performance of GaN-Based Designs Webinar

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