GaN First Time Right™ Webinar

Join EPC Applications Engineer Tiziano Morganti on 29 April 2025, for a webinar on PCB Layout Rules for Converters and Motor Drives. Learn critical techniques to minimize parasitic inductance, optimize gate circuit layouts, and avoid common design pitfalls.

Why Attend?

• Understand the Impact of Parasitic Inductances – Learn how common source, power loop, and gate loop inductances impact power loss and switching efficiency
• Compare Layout Designs – Evaluate different PCB layouts and their effects on performance
• Design a Low Inductance Layout – Master best practices for power loop and gate drive layouts
• Avoid Common Mistakes – Identify layout errors and how to fix them
• Improve EMI Performance – Learn techniques to minimize loop inductance and improve EMI performance
• Explore PCB Requirements for EPC GaN FETs – Optimize your board for enhanced performance in motor drives and DC/DC converters

Who Should Attend?

This webinar is ideal for power electronics engineers, PCB designers, and system architects working on high-performance power conversion and motor drive applications.

Event Details

  Date: 29 April 2025

 Time: 3:00 pm CEST

  Location: Online

 Registration: Free

Register Now